The Enhanced Universal Synchronous Asynchronous Receiver Transmitter (EUSART) module is a serial I/O communication peripheral built within the PIC18 series of microcontrollers form Microchip. It contains all clock generators, shift registers and data buffers needed to perform input or output serial data transfers independently of program execution in the device.
The EUSART can be configured either in a full-duplex asynchronous mode or a half-duplex synchronous mode. The Half-Duplex Synchronous mode is suitable for serial communications with other ICs, such as A/D or D/A converters or EEPROMs. The Asynchronous mode would typically be used in RS-232, RS-485, and RS-422 systems, and this mode is commonly used when communicating with external equipment. Asynchronous mode is used in applications where it isn’t practical to have separate channels for data and clocking signals, such as infra-red and wireless devices.
The standard non-return-to-zero (NRZ) format is used for data transfer, where consecutively transmitted data bits of the same value stay at the output level of that bit without returning to a neutral level between each bit transmission.
A transmission port idles in the “mark” state, which represents a “1” bit (VOH state). The VOL “space” state represents the ‘0’ data bit.
The transmission of a character always starts by sending a Start bit, which is followed by eight or nine data bits, and then is terminated by one or more Stop bits. The Start bit is always a space (0) and the Stop bits are always marks (1s).
The receiving end recognizes the beginning of a data transfer operation by sensing a VOL state on the data line.
The EUSART will transmit and receive the LSB first. The transmitter and receiver sections are functionally independent (which allows the full-duplex mode), except that they use the same data format and baud rate. Each transmitted bit occurs for a period of 1/(Baud Rate). The baud rate is determined either form the internal 8-bit/16-bit Baud Rate Generator, or it is automatically calculated from the received data signal. The hardware doesn’t include any support for parity, and parity control must be done with software, where the ninth data bit is used for parity. Once a “frame’ of data is transmitted, the next one can occur at any time.
The next article will discuss the Asynchronous mode of operation in the EUSART, where no clock signal is used between transmitter and receiver.
- James Reinolm